EH36 Series Oscillator
Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)
Revision D 11/02/2011
Electrical Specifications
| Nominal Frequency |
1.000MHz to 200.000MHz
Some frequencies within this range may not be available. |
| Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, First Year Aging at 25°C, Shock, and Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
|
| Operating Temperature Range |
0°C to +70°C
-40°C to +85°C
|
| Supply Voltage (VDD) |
3.3VDC ±0.3VDC |
| Input Current |
35mA Maximum (Unloaded) |
| Output Voltage Logic High (VOH) |
2.7VDC Minimum (IOH=-8mA) |
| Output Voltage Logic Low (VOL) |
0.5VDC Maximum (IOL=+8mA) |
| Duty Cycle |
Measured at 50% of waveform
50 ±10(%)
50 ±5(%)
|
| Rise Time/Fall Time |
Measured at 20% to 80% of Waveform
6nSec Maximum from 1.000MHz to 70.000MHz
4nSec Maximum from 70.000001MHz to 200.000MHz
|
| Load Drive Capability |
30pF Maximum from 1.000MHz to 70.000MHz
15pF Maximum from 70.000001MHz to 200.000MHz |
| Aging (at 25°C) |
±5ppm/year Maximum |
| Storage Temperature |
-55°C to +125°C |
| Output Control Function |
Tri-State Enable High |
| Input Voltage |
70% of VDD or greater or No Connection to enable output. 20%
of VDD or less to disable output (High Impedance State)
|
| Jitter |
Absolute: ±250pSec Maximum, ±100pSec Typical
One Sigma: ±50pSec Maximum, ±40pSec Typical |
| Start Up Time |
10mSec Maximum |