EMK21 Series Oscillator
MEMS Clock Oscillators LVCMOS (CMOS) 1.8Vdc 4 Pad 3.2mm x 5.0mm Plastic Surface Mount (SMD)
Revision J 04/16/2010
Electrical Specifications
| Nominal Frequency |
1.000MHz to 125.000MHz Some frequencies within this range may not be available. |
| Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, First Year Aging at 25°C, 260°C Reflow, Shock and Vibration)
±100ppm Maximum
±50ppm Maximum
|
| Operating Temperature Range |
-40°C to +85°C |
| Supply Voltage (VDD) |
1.8VDC ±5% |
| Input Current |
15mA Maximum over Nominal Frequency of 1.000MHz to 25.000MHz
18mA Maximum over Nominal Frequency of 25.000001MHz to 125.000MHz |
| Output Voltage Logic High (VOH) |
90% of VDD Minimum (IOH= -8mA) |
| Output Voltage Logic Low (VOL) |
10% of VDD Maximum (IOL= +8mA) |
| Duty Cycle |
Measured at 50% of waveform
50 ±5(%)
|
| Rise Time/Fall Time |
Measured at 20% to 80% of Waveform
2nSec Maximum
|
| Load Drive Capability |
15pF Maximum |
| Storage Temperature |
-55°C to +125°C |
| Output Control Function |
Tri-State (Disabled Output: High Impedance)
Power Down (Disabled Output: Logic Low) |
| Output Control Input Voltage |
+0.7VDD Minimum or No Connect to Enable Output. +0.3VDD Maximum to Disable Output |
| Standby Current |
50µA Maximum (Disabled Output: Logic Low) at Output Control Function of Power Down |
| Peak to Peak Jitter |
500pSec Maximum, 200pSec Typical over Nominal Frequency of 1.000MHz to 12.287999MHz
250pSec Maximum, 100pSec Typical over Nominal Frequency of 12.288MHz to 125.000MHz |
| Aging (at 25°C) |
±1ppm Maximum First Year |
| Start Up Time |
50mSec Maximum |